Maya B. Gokhale, Lawrence Livermore National Lab: Applied scientific computing

RISC-V Vectors Present and Future: Can they measure up?

The RISC-V CPU core open architecture specification has generated a multitude of microarchitecture implementations predominantly deeply embedded in Systems on Chip (SoC). Recently RISC-V products and research implementation have emerged that include vector units for acceleration. Currently RISC-V vector CPU systems are available commercially, and there is an active body of research designing high performance vector microarchitectures integrated with scalar processing cores.

In this talk, we evaluate performance of existing and proposed RISC-V vector systems using a collection of measurement techniques. We'll present findings from performance measurement of several commercial RISC-V Vector systems. To evaluate proposed systems, we employ a collection of simulation tools from compiler-oriented to FPGA to AI-assisted.