Professor Shimeng Yu at ECE Spring 2025 Colloquium

Ferroelectric devices, circuits and architectures for AI hardware design 

This presentation will discuss the recent progresses on doped HfO2 based ferroelectric devices and their applications towards AI on-chip acceleration: 1) fundamental device physics and variability of silicon channel ferroelectric field effect transistor (FeFET), and a compute-in-memory prototype chip taped-out via Global Foundries 28nm shuttle ; 2) a new concept on ferroelectric non-volatile capacitor (nvCap) for “charge-domain” compute-in-memory for improved energy efficiency; 3) back-end-of-line (BEOL) compatible amorphous oxide channel FeFET for monolithic 3D integrated compute-in-memory architecture, featuring ferroelectric gated routers as reconfigurable interconnects to support versatile AI models. 

Start date
Thursday, March 20, 2025, 4 p.m.
Location

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