Postdoc scholar Arvind Sharma recognized for contributions to ALIGN

Postdoctoral scholar Arvind Sharma was honored at the 2021 University of Minnesota Postdoc Awards in Impactful Research. He was recognized for his significant contributions to the ALIGN (Analog Layout, Intelligently Generated from Netlists) project. 

A key part of designing analog circuits is constructing the layout, and ALIGN is aimed at  automating this highly sensitive process. Sharma is responsible for developing an open-source analog cell generator that is being used in ALIGN for automated layout generation across disparate commercial manufacturing processes (for instance the GlobalFoundries-12nm, TSMC-65nm, and SkyWater-130nm processes). The cell generator also considers layout dependent effects (LDEs), parasitics and electromigration, and handles complex design rules  which are critical in advanced technology nodes. When the layouts are completed, they are sent to a foundry to be fabricated on a chip. 

Besides the cell generator, Sharma has developed a methodology to simplify or abstract the complex design rules for a process technology node. The abstraction separates the main ALIGN flow from a specific process technology node, which allows it to be easily ported across different manufacturing processes.

To cancel the impact of process variations on analog circuits, Sharma also undertook a critical analysis of the fundamental assumptions that underlie the use of common centroid (CC) layouts. Based on his analysis, he incorporated considerations related to systematic and random variations as well as the impact of CC layouts on circuit performance. His work has resulted in significant performance improvement of analog circuits in comparison to existing approaches. 

Sharma’s contributions to ALIGN have been commended by his supervisor professor Sachin Sapatnekar and professor Ramesh Harjani, a key collaborator on the project. “Dr. Sharma has shown an outstanding level of excellence and has conducted high-impact research as a postdoctoral scholar. [He is the] primary reason why the project has made major headway and has had a substantial impact on both academic research and industry.”

Sharma earned his master’s and doctoral degrees from the Indian Institute of Technology, Roorkee, under the supervision of professor Anand Bulusu. His research interests were microelectronics and VLSI circuits. As a doctoral student, he developed new methodologies to optimize circuit performance in the presence of a process variation called layout dependent effects (LDEs). His dissertation is titled, “Process Induced Mechanical Stress-Aware CMOS Circuit Design.”

His current research interests also include device-circuit co-design. He investigates and models the impact of process variations on device level parameters. These variations can be modelled as a function of device-, or circuit-, or layout-level parameters. Once modelled, they can be considered in circuit design methodologies for optimizing transistor sizes and layout. These optimized circuits have better on-chip performance. Sharma’s recent work in the area has been published in Proceedings of the IEEE/ACM International Conference on Computer-Aided Design (ICCAD) 2021: “Performance-Aware Common-Centroid Placement and Routing of Transistor Arrays in Analog Circuits,” and in Proceedings of Design, Automation and Test in Europe (DATE) 2020: “Common-Centroid Layouts for Analog Circuits: Advantages and Limitations”.

ALIGN is being developed with funding from DARPA under its IDEA (Intelligent Design of Electronic Assets) program. The University of Minnesota partners with Texas A&M University, and Intel Corporation on the project. Recent work on ALIGN has been published in IEEE Design & Test 2020: “ALIGN: A System for Automating Analog Layout” and in Proceedings of the IEEE/ACM Design Automation Conference (DAC), 2019: “ALIGN: Open-Source Analog Layout Automation from the Ground Up.”