Events Listing

List of Upcoming Events

There are no upcoming events matching your criteria.

List of Past Events

Professor Keshab Parhi at the Wilson Lecture Series

Accelerator Architectures for Deep Neural Networks: Inference and Training

Machine learning and data analytics continue to expand the fourth industrial revolution and affect many aspects of our lives. The talk will explore hardware accelerator architectures for deep neural networks (DNNs). I will present a brief review of history of neural networks. I will talk about our recent work on Perm-DNN based on permuted-diagonal interconnections in deep convolutional neural networks and how structured sparsity can reduce energy consumption associated with memory access in these systems (MICRO-2018). I will then talk about reducing latency and memory access in accelerator architectures for training DNNs by gradient interleaving using systolic arrays (ISCAS-2020). Then I will present our recent work on LayerPipe, an approach for training deep neural networks that leads to simultaneous intra-layer and inter-layer pipelining  (ICCAD-2021). This approach can increase processor utilization efficiency and increase speed of training without increasing communication costs.

Biography of professor Keshab Parhi

Keshab K. Parhi received the B.Tech. degree from the Indian Institute of Technology (IIT), Kharagpur, in 1982, the M.S.E.E. degree from the University of Pennsylvania, Philadelphia, in 1984, and the Ph.D. degree from the University of California, Berkeley, in 1988. He has been with the University of Minnesota, Minneapolis, since 1988, where he is currently Distinguished McKnight University Professor and Edgar F. Johnson Professor of Electronic Communication in the Department of Electrical and Computer Engineering. He has published over 650 papers, is the inventor of 32 patents, and has authored the textbook VLSI Digital Signal Processing Systems (Wiley, 1999) and coedited the reference book Digital Signal Processing for Multimedia Systems (Marcel Dekker, 1999). His current research addresses VLSI architecture design of machine learning systems, hardware security, data-driven neuroscience and molecular/DNA computing. Dr. Parhi is the recipient of numerous awards including the 2017 Mac Van Valkenburg award and the 2012 Charles A. Desoer Technical Achievement award from the IEEE Circuits and Systems Society, the 2004 F. E. Terman award from the American Society of Engineering Education, the 2003 IEEE Kiyo Tomiyasu Technical Field Award, the 2001 IEEE W. R. G. Baker prize paper award, and a Golden Jubilee medal from the IEEE Circuits and Systems Society in 2000. He served as the Editor-in-Chief of the IEEE Trans. Circuits and Systems, Part-I during 2004 and 2005. He is a Fellow of IEEE, ACM, AAAS and the National Academy of Inventors.

Mock Interviews for Research Positions

CAUSE is offering a professional development event. Co-hosted with Sandia National Laboratories, professionals from Sandia will hold individual mock interviews for national labs. After the interview, they will review your interview performance as well as your CV. 

The event will be held virtually in the CAUSE Zoom Interview Room. Please fill out this RSVP, so we can determine the time of the mock interviews.

Also register with Sandia, so you can submit a copy of your CV or résumé to them prior to the interview.

IEEE Game Night Tonight with professor David Orser

Join IEEE UMN and professor David Orser as they play some games 6 pm today. Meet us in the IEEE room. Pizza will be provided!

IEEE Weekly Board Meeting

IEEE UMN holds its weekly board meetings on Sundays at 9:30am via Zoom. All are welcome to join as the committee plans, discusses, and organizes events and networking opportunities. This is a great way to become involved in the decisions that IEEE makes! 

Link for the Zoom meeting:

Halloween Event: Chills and Thrills with SASE, CSEIA, JSA, and TASA

Join us for a night of chills and thrills at our spooktacular Halloween celebration. You can participate in fun Japanese crafts, pumpkin painting, and a spooky murder mystery. Don't forget to bring your A-game and come in your finest Halloween costumes to participate in our costume contest for the chance to win some fabulous prizes!

We will have Raising Cane's and Banh Appetit in addition to an abundance of Asian candies to satisfy your sweet tooth!

IEEE hosts Halloween movie night

IEEE is hosting Halloween Movie Night! Shaun of the Dead, popcorn, and refreshments. Be there!


Dr. Bodhisatwa Sadhu at the Wilson Lecture Series

Silicon-based Millimeter-wave Phased Arrays for 5G: Fundamentals to Future Trends

5G relies on millimeter-wave phased arrays to achieve high data rates and low latency. The majority of the 5G millimeter-wave infrastructure will be partially or completely based on silicon technology. This talk will discuss key aspects of silicon-based millimeter-wave phased-array module design and characterization. It will cover the history and fundamentals of millimeter wave and phased arrays, provide an overview of phased array antenna modules using silicon technology, and take a deep dive into an example 5G phased array antenna module. The talk will end with a peek into the future of millimeter-wave directional communications for 6G and beyond.

Biography of Dr. Bodhisatwa Sadhu

Bodhisatwa Sadhu received the B.E. degree in Electrical and Electronics Engineering from BITS-Pilani, India in 2007, and the Ph.D. degree in Electrical Engineering from the University of Minnesota, Minneapolis, in 2012.

He is currently a Research Staff Member with the RF/mm-wave Communication Circuits & Systems Group at IBM T. J. Watson Research Center, Yorktown Heights, NY, USA, and an Adjunct Assistant Professor at Columbia University, NY. At IBM, he has led the design and demonstration of the world’s first reported silicon-based 5G phased array IC, a low power 60GHz CMOS transceiver IC for 802.11ad communications, and a software-defined phased array radio. He has authored and co-authored 50+ peer-reviewed papers, the book Cognitive Radio Receiver Front-Ends-RF/Analog Circuit Techniques (Springer, 2014), and several book chapters. He also holds 60+ issued U.S. patents. Dr. Sadhu currently serves as an IEEE MTT-S Distinguished Microwave Lecturer, the RFIC Systems & Applications sub-committee Chair and a Steering Committee Member of the IEEE RFIC Symposium, TPC member of the Wireless Subcommittee at IEEE ISSCC, and has served as Guest Editor of IEEE TMTT in 2021 and IEEE JSSC in 2017.

Dr. Sadhu is the recipient of the 2017 ISSCC Lewis Winner Award for Outstanding Paper (best paper award), the 2017 JSSC Best Paper Award, the 2017 Pat Goldberg Memorial Award for the best paper in computer science, electrical engineering, and mathematics published by IBM Research, four IBM Outstanding Technical Achievement Awards, twelve IBM Patent Plateau Awards, the University of Minnesota Graduate School Fellowship in 2007, 3M Science and Technology Fellowship in 2009, the University of Minnesota Doctoral Dissertation Fellowship in 2011, the BITS Pilani Silver Medal in 2007, and stood 2nd in India in the Indian School Certificate (ISC) examination in 2003. He was recognized as an IBM Master Inventor in 2017, and was selected by the National Academy of Engineering for its Frontiers of Engineering Symposium in 2020.


IEEE Weekly Board Meeting

IEEE UMN holds its weekly board meetings on Sundays at 9:30am via Zoom. All are welcome to join as the committee plans, discusses, and organizes events and networking opportunities. This is a great way to become involved in the decisions that IEEE makes! 

Link for the Zoom meeting:

IEEE Consulting Workshop

IEEE-USA Alliance of IEEE Consultants Networks Coordinating Committee (AICNCC) and the IEEE Twin Cities Section invites you to attend a half day workshop on consulting.  The Consultants Workshop event is designed for those who are considering consulting as a professional option – either now or in the future and practicing consultants who want to improve their networking and marketing skills.

Register to attend the workshop

Prof. Kevin Tomsovic at the Wilson Lecture Series - ECE fall 2021

Analysis and Simulation for Modern Power Grids

Power system analysis has long relied on large scale computer modeling of well-understood physical models and generally agreed upon simplifications, such as, the separation of transmission and distribution, ZIP models for aggregate loads, and so on. Recent trends in the grid, such as, increasing numbers of inverter based resources, requires a rethinking of the models and these underlying assumptions. Beyond the increase in power electronic interfaced devices, the growing importance of the communication network; a more actively controlled distribution system and new performance requirements for reliability and resilience requires new approaches. This talk will review some of our research in CURENT using both software and hardware simulation as well as analytic methods for this changing system.

Bio of professor Kevin Tomsovic

Kevin Tomsovic is currently CTI Professor in the Dept. of EECS at University of Tennessee, and director of CURENT, a National Science Foundation and Department of Energy Engineering Research Center. He received his BS degree from Michigan Technological University, Houghton, in 1982, and his MS and Ph.D. degrees from University of Washington, Seattle, in 1984 and 1987, respectively, all in electrical engineering. He has held positions at Washington State University, National Cheng Kung University, National Sun Yat-Sen University, Royal Institute of Technology, and Kumamoto University. He was a Program Director at the National Science Foundation in the Electrical and Communications Systems division of the Engineering directorate from 2004-2006. He is a Fellow of the IEEE. His research focuses on control and computational methods for the electric power grid.